1. Field
The present invention relates to a package substrate and a method fabricating thereof, and more particularly, to a package substrate capable of having a passive device having a predetermined capacity embedded therein, while reducing a pattern size and increasing component mounting density, and a method fabricating thereof.
2. Description of the Related Art
In accordance with the recent development of the electronic industry, the demand for compact, multi-functional electronic components has rapidly increased.
In accordance with this trend, there has been a demand for a package substrate having a high density circuit pattern. Therefore, various methods of implementing a fine circuit pattern have been designed and used.
An embedded process, which is one method of implementing the fine circuit pattern, has a structure in which a circuit is impregnated with an insulating material, and may improve the flatness and strength of a product and have less circuit damage, whereby the method is appropriate for implementing the fine circuit pattern.
In the case of the embedding process according to the related art, a substrate has been configured by mounting or stacking packages or devices directly on the substrate. In this case, when the packages are mounted on double sides or a single side of the substrate, the entire package area may be reduced.
Accordingly, various researches into an embedded process or structure for an active device and an LRC device have been conducted.
However, in the case in which the substrate having the electronic device embedded therein is fabricated according to the related art, there is a risk that the electronic device may be damaged due to use of adhesive tape, or the like, and a fabricating process of the substrate is significantly complicated.